Part Number Hot Search : 
DM74ALS X9381 B43698 IRGPC50M BA440 CDLL254 DTA114 CDLL254
Product Description
Full Text Search
 

To Download 2001562 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 Preliminary
PM3392 S/UNI(R)-1x10GE
Single Chip 10 Gigabit Ethernet LAN PHY
GENERAL DESCRIPTION
The S/UNI 1x10GE is a single chip 10 Gigabit Ethernet LAN PHY operating at 10.3 Gbit/s. The S/UNI 1x10GE is intended for application in 10 Gigabit Ethernet LAN PHY port cards. The S/UNI 1x10GE uses the POS-PHY Level 4TM system-side interface and the XSBI line-side interface. * Internal 128 KB ingress FIFO and 16 KB egress FIFO to accommodate system latencies and provide lossless flow control up to 5 km for regular size frames. * Line-side and system side loopback for system level diagnostic capability. * Provides a generic 16-bit microprocessor bus interface for configuration, control, and status monitoring. * Standard 5 signal P1149.1 JTAG test port. * Low-power 1.8 V CMOS core logic with 3.3 V CMOS/TTL compatible digital inputs and digital outputs. * Industrial temperature range (-40 C to +85 C). * 896-pin FCBGA package. * Provides eight exact-match address filters to filter frames based on SA, SA/VID, DA, or DA/VID. * Provides 64-bin hash based algorithm to filter multicast addresses. * Minimum frame size of 64 bytes. * Provides statistics counters to support RMON/SNMP. * Supports jumbo frames up to 9.6 kbytes. * Programmable inter-packet gap (IPG). * Implements in-band PAUSE flowcontrol and provides support for out-ofband flow control. * Upper layer device can flow-control using dedicated pins or host signaling to cause generation of a PAUSE frame.
FEATURES
* Implements 10 Gigabit Ethernet LAN PHY according to the IEEE P802.3ae standard currently under development. * Provides direct connection to optics via a 16-bit by 645 MHz IEEE P802.3ae XSBI line-side interface. * Provides SATURN(R) POS-PHY Level 4TM 16-bit LVDS system-side interface (clocked at 700 MHz nominal). * Provides standard IEEE 802.3ae 10 Gigabit Ethernet Media Access Controller (10GMAC) for frame verification. * Implements IEEE P802.3ae 64B/66B Physical Coding Sublayer (PCS).
DEVICE INTERWORKING
* Other PMC-Sierra devices that implement the POS-PHY Level 4TM interface include: * S/UNI 9953. * S/UNI 9953-POS. * S/UNI 10xGE.
10 GIGABIT ETHERNET MAC
* Verifies frame integrity (FCS and length checks). * Egress Ethernet frame encapsulation (pads to minimum size, add preamble, IFG and CRC generation). * Support for VLAN tagged frames.
BLOCK DIAGRAM
RSTAT RSCLK XSBI Rx Interface Rx 64B/ 66B Decoder 10 Gigabit Ethernet MAC POSIngress PHY Flexible Level 4 FIFO Interface
RXDATA +/RXCLK
RDAT+/RDCLK +/RCTL +/PL4 REFCLK +/-
RF TDCLK +/TDAT +/TCTL +/-
TXCLK TXDATA +/TX_CLK_SRC
XSBI TX Interface
Tx 64B/ 66B Encoder
10 Gigabit Ethernet MAC
POSEgress PHY Flexible Level 4 FIFO Interface
TSTAT TSCLK
Microprocessor
JTAG
D[15:0] A[13:0] ALE CSB RDB WRB RSTB INTB
TDO TDI TMS TCK TRSTB
PMC-2001562 (p2)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
Copyright PMC-Sierra, Inc. 2001
Preliminary PM3392 S/UNI(R)-1x10GE
Single Chip 10 Gigabit Ethernet LAN PHY
POS-PHY LEVEL 4TM INTERFACE
* Designed to transmit cells, packets, or frames between physical and data-link layer devices. * Requires fewer pins and draws less power than other 10 Gigabit interface options. * Compliant with the following standards: * Optical Internetworking Forum - System Physical Interface Level 4 Phase II (SPI-4 Phase II). * ATM Forum - Frame Based ATM Interface Level 4 (ATMF0161.00). * SATURN(R) POS-PHYTM Level 4, Issue 6, March 2001.
APPLICATIONS
* Edge and Core Routers. * Multi-Service (Multi-Protocol) Switches. * Internet POP and Transport POP L2 Ethernet Switches. * Uplink cards. * 10 Gigabit Ethernet test equipment.
TYPICAL APPLICATION
10 GIGABIT ETHERNET ROUTER PORT APPLICATIONS
1 X 10 Gigabit Ethernet WAN PHY Line Card
4 or Serial Optics XSBI I/F S/UNI 9953 L2/L3 Processor Traffic Manager
1 X 10 Gigabit Ethernet LAN PHY Line Card
4 or Serial Optics XSBI I/F S/UNI 1x10GE L2/L3 Processor Traffic Manager
TT1 Multi-Gbit/s to Terabit Switch Fabric
Head Office: PMC-Sierra, Inc. #105 - 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200
To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator
All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: info@pmc-sierra.com
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
PMC-2001562 (p2) Copyright PMC-Sierra, Inc. 2001. All rights reserved. SATURN and S/UNI are registered trademarks and POS-PHY and PMC-Sierra are trademarks of PMCSierra, Inc.


▲Up To Search▲   

 
Price & Availability of 2001562

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X